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Gate Dielectric Engineering with an Ultrathin Silicon-oxide Interfacial Dipole Layer for Low-Leakage Oxide-Semiconductor Memories
We demonstrate a gate dielectric engineering approach leveraging an ultrathin, atomic layer deposited (ALD) silicon oxide interfacial …
Fabia Farlin Athena, Jonathan Hartanto, Matthias Passlack, Jack C. Evans, Jimmy Qin, Didem Dede, Koustav Jana, Shuhan Liu, Tara Peña, Eric Pop, Greg Pitner, Iuliana P. Radu, Paul C. McIntyre, H.-S. Philip Wong
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A van der Waals material exhibiting room temperature broken inversion symmetry with ferroelectricity
Since the initial synthesis of van der Waals two-dimensional indium selenide was first documented in 1957, five distinct polymorphs and …
Fabia Farlin Athena, Cooper A Voigt, Mengkun Tian, Anjan Goswami, Emily Toph, Moses Nnaji, Fanuel Mammo, Brent K Wagner, Sungho Jeon, Wenshan Cai, Eric M Vogel
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MAX Phase Ti2AlN for HfO2 Memristors with Ultra‐Low Reset Current Density and Large On/Off Ratio
A Ti2AlN MAX phase layered thin film electrode and oxygen getter layer for HfO2‐based two‐terminal memristors is presented. The …
Fabia Farlin Athena, Moses Nnaji, Diego Vaca, Mengkun Tian, Wolfgang Buchmaier, Khandker Akif Aabrar, Samuel Graham, Suman Datta,, Satish Kumar, Eric M Vogel
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Demonstration of Transfer Learning Using 14 nm Technology Analog ReRAM Array
Analog memory presents a promising solution in the face of the growing demand for energy-efficient artificial intelligence (AI) at the …
Fabia Farlin Athena, O. Fagbohungbe, N. Gong, M.J. Rasch, J. Penaloza, S.-C. Seo, A. Gasasira, P. Solomon, V. Bragaglia, S. Consiglio, H. Higuchi, C. Park, K. Brew, P. Jamison, C. Catano, I. Saraf, C. Silvestre, X. Liu, B. Khan, N. Jain, S. Mcdermott, R. Johnson, I. Estrada-raygoza, J. Li, T. Gokmen, N. Li, R. Pujari, F. Carta, H. Miyazoe, M.M. Frank, D. Koty, Q. Yang, R. Clark, K. Tapily, C. Wajda, A. Mosden, J. Shearer, A. Metz, S. Teehan, N. Saulnier, B. J. Offrein, T. Tsunomura, G. Leusink, V. Narayanan, T. Ando
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Describing the Analog Resistance Change of HfOx-based Neuromorphic Synapses using a Compact Series Trap-Assisted Tunneling and Ohmic Conduction Model
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Fabia Farlin Athena, Eric M Vogel
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ReSta: Recovery of Accuracy During Training of Deep Learning Models in a 14-nm Technology-Based ReRAM Array
In this article, we propose an electrical bias technique to recover the accuracy of a degraded -based resistive random access memory …
Fabia Farlin Athena, Nanbo Gong, Ramachandran Muralidhar, Paul Solomon, Eric M Vogel, Vijay Narayanan, Takashi Ando
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Trade-off between Gradual Set and On/Off Ratio in HfOx-Based Analog Memory with a Thin SiOx Barrier Layer
HfOx-based synapses are widely accepted as a viable candidate for both in-memory and neuromorphic computing. Resistance change in …
Fabia Farlin Athena, Matthew P West, Jinho Hah, Samuel Graham, Eric M Vogel
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Thermal environment impact on HfOx RRAM operation: A nanoscale thermometry and modeling study
As the demand for computing applications capable of processing large datasets increases, there is a growing need for new in-memory …
Matthew P West, Georges Pavlidis, Robert H Montgomery, Fabia Farlin Athena, Muhammad S Jamil, Andrea Centrone, Samuel Graham, Eric M Vogel
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Asymmetric Resistive Switching of Bilayer HfO x/AlO y and AlO y/HfO x Memristors: The Oxide Layer Characteristics and Performance Optimization for Digital Set and Analog Reset Switching
Understanding the resistive switching behavior, or the resistance change, of oxide-based memristor devices, is critical to predicting …
Pradip Basnet, Erik Anderson, Fabia Farlin Athena, Bhaswar Chakrabarti, Matthew P. West, Eric M. Vogel
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Bias history impacts the analog resistance change of HfOx-based neuromorphic synapses
Resistive random-access memory (RRAM) devices have been widely studied for neuromorphic, in-memory computing. One of the most studied …
Matthew P West, Fabia Farlin Athena, Eric M Vogel, Samuel Graham
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